Address in Program Counter Register

Question

We know that the Program Counter contains the address of the next instruction to be executed. I am trying to understand which address this is - logical (CPU) or physical (RAM).

Answer 1

On all the architectures I know, it's a logical (virtual) address. That's really the only way that's useful. You want page translation to apply to instruction fetches just like data accesses, so that all the features of paging can be used for code as well as data. And for architectures that can do PC-relative data addressing, you want virtual addresses there too - since all data instructions are subject to page translation, you can't really do anything useful with a physical address.

(Just to acknowledge dirac3000's point - if the machine doesn't have an MMU or it's disabled, like x86 in real mode, then all addresses are physical and the distinction between "logical" and "physical" doesn't exist, so the question becomes moot.)

Answer 2

The address is virtual, i.e. it contains the address the CPU sees at that moment. That is true in most PCs and architectures that contain an MMU. In a microcontroller (e.g.: Arduino CPU, STM32 etc), program counter will always contain physical addresses.