Displaying verilog structures in gtkwave from FSDB

Question

GTKwave 3.3 does not display Verilog structures dumped by VCS into FSDB.

I declare a typedef:

typedef struct packed {
    logic [DATA_WIDTH-1:0] data;
    logic                  valid;
    logic                  fp;
} in_tdef;

And then use it as input:

input in_tdef isv_data_in;

but GTKwave does not display this port. I can see all other single bit vectors or busses but not the structure. I do not see any switches that I need to use to enable displaying structures.

Can gtkwave 3.3 display structures, or array of structures?

Answer 1

gtkwave 3.3 does pretty-print packed struct. But the result also depends on the the source of the dump. If the packed struct is dumped as a big wire and gtkwave can do nothing about that. For a VCD file, you can open it with a text editor to see whether the packed struct is dumped correctly.

Answer 2

GTKwave presents structures at a “submodule” hierarchy. Elements of the structure are expanded in the hierarchy pane.