In the RISCV SBI, there are explanations about supervisor and machine communication. As an example, A0-A7 registers are filled with Function and extension ID and also return values for SBI functions. I didn't understand that whether those things are done in hardware or software.
I mean when supervisor code fills register for FID #1 (implementation id) before ECALL instruction, does the machine trap handler control the A0-A7 registers and return the relevant value after reading mimpid by csrr? Or does hardware look directly the register carrying FID and fill the register with mimpid without any handler?
If it is the second case, does the core also jump to a handler or does it directly continue to the next instruction with filled registers with the returned SBI function values?