I'm looking a way to overload parts of a Makefile A to another one B, hence extending A.
For instance we have the following makefile A:
TEXT="AHAHA"
default: after-default
before-default:
echo "BEFORE DEFAULT"
default: before-default
echo ${TEXT}
after-default: default
echo "AFTER DEFAULT"
I want to reuse it in a new Makefile B like this:
TEXT="HIHIHI"
before-default:
echo "NEW BEFORE DEFAULT"
The new makefile will print:
NEW BEFORE DEFAULT
HIHIHI
AFTER DEFAULT
This example is a bit absurd it is not possible like this way, but I want to know if it is possible to make such Makefile composition close to this idea.
Your example will be trivially fulfilled by adding
include Aat the start ofB. The newbefore-defaulttarget will override the old one.This isn't a very good design, though; parametrizing things like you already do with
TEXTcomes with fewer surprises than having code that is being overridden elsewhere.(See my comment above re: why the output is in the opposite order from what you were hoping.)