How to generate LLVM SSA Format

Question

I write the following C code where variable X is being assigned twice:

int main()
{
        int x;
        x = 10;
        x = 20;
        return 0;
}

Compile and generate IR representation using the following command

clang -emit-llvm -c ssa.c

IR generated

; Function Attrs: nounwind uwtable
define i32 @main() #0 {
entry:
  %retval = alloca i32, align 4
  %x = alloca i32, align 4
  store i32 0, i32* %retval
  store i32 10, i32* %x, align 4
  store i32 20, i32* %x, align 4
  ret i32 0
}

If my understanding of SSA format is correct, we should in this example see x1 and x2 as two LLVM IR variables generated and assigned two values 10 and 20 respectively. Is there some specific option we should compile with to get SSA IR representation or my understanding of IR representation is incorrect? Please advise.

EDIT: as suggested in one answer, using -mem2reg optimization pass gives me the following output

clang -c -emit-llvm ssa.c -o ssa.bc
opt -mem2reg ssa.bc -o ssa.opt.bc
llvm-dis ssa.opt.bc
cat ssa.opt.ll

Resultant IR generated

; Function Attrs: nounwind uwtable
define i32 @main() #0 {
entry:
  ret i32 0
}

it looks like the entire x assignment got optimized using mem2reg optimization. Any other way to generate and retain different x values?

Answer 1

LLVM passes mem2reg and reg2mem convert code to/from SSA form. You can run them using opt tool.