this already took me hours to figure out.
With:
in r18, SREG-0x20
the I-bit is not stored (0x94 in SREG translates to 0x14 in r18).
The same outcome happens with this:
ldi r30, lo8(0x5f)
ldi r31, hi8(0x5f)
ld r18, Z
Maybe this is on purpose? Or is it just the simulator? I tested it with other registers, but it seems to be only SREG- I-bit.
Also i am running an mixed c/asm project.