Implementing a Mux 2:1 using only XNOR, NAND, OR with maximum of 4 gates

Question

I had been given a task to implement a mux2:1 using only these given gates: XNOR NAND OR.

The inputs would be a, b and sel (select).

The output should be z (there's no enable input).

The maximum number of gates to be used is 4 (and only those 3 gates).

My idea was this:

Created a truth table for the MUX:

a   b  sel  z
-------------
0   0   0   0
0   0   1   0
0   1   0   0
0   1   1   1
1   0   0   1
1   0   1   0
1   1   0   1
1   1   1   1

Then Created a karnaugh map:

sel\ab  00  01  11  10
----------------------
 0   |   0   0   1   1
 1   |   0   1   1   0

The function as a sum of products is:

z=c'a+cb

And from here on I tried using [tag:boolean algebra] to expand the function so that it matches an algebraic notation that matches the given gates.

Also, I know that to create c' I can used NAND(c,c) and for AND I can use 2 NANDS, but if I apply this to this expression I get 6 logical gates, and the maximum is 4.

Answer 1

Implementation:

function:

algebraic proof: