in CMSIS, why are bitfield positions 'unsigned int' but the mask base 'unsigned long int'?

Question

Here is an example from a ST CMSIS header:

#define USART_ISR_TC_Pos              (6U)
#define USART_ISR_TC_Msk              (0x1UL << USART_ISR_TC_Pos)

Everywhere in CMSIS headers, the bitfield positions (_Pos) are given as decimal integer constants of type unsigned int and the unshifted masks are unsigned long int.

Why is it that they both are not specified as unsigned long int?

Answer 1

1. Bit position: Position in the register cannot be more than 31 and any integer type in C can hold it. There is no reason even to make the position unsigned.

2. The mask. As the minimum unsigned int size required by the C standard is not big enough to hold 32 bit value, It has to be declared as unsigned long. CMSIS authors do not know the compiler you are going to use so they use the minimal sufficient type.

Answer 2

There's no apparent reason why. I very much doubt these libs are meant to be shared with 8- or 16 bitters, which would be the only sensible explanation.

A Cortex M will be 32 bit with 32 bit int and 32 bit long. And most importantly 32 bit hardware peripheral registers. So even if long was 64 bit it would be senseless to shift a mask outside the register bounds.

The U suffix is enough to prevent undefined behavior left shifts on a signed operand. Other sloppy libs use the bugged 1 << n style, so maybe 1UL was a quick fix to correct that bug - where 1U would have worked just as fine.