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pause instruction in x86
Intel's Optimization Reference Manual has the following to say about spin-wait loops:
3.4.1.2 Spin-Wait and Idle Loops
The Pentium 4 processor introduces a new PAUSE instruction; the instruction is architecturally a NOP on Intel 64 and IA-32 processor implementations.
To the Pentium 4 and later processors, this instruction acts as a hint that the code sequence is a spin-wait loop. Without a PAUSE instruction in such loops, the Pentium 4 processor may suffer a severe penalty when exiting the loop because the processor may detect a possible memory order violation. Inserting the PAUSE instruction significantly reduces the likelihood of a memory order violation and as a result improves performance
I am trying to understand the highlighted portion: the processor
may detect a possible memory order violation. Could you explain what this means? In what circumstances could such a violation arise in a busy loop, and why does using PAUSE help? Would the violation be real or spurious, and what would be the consequences of not avoiding it?
A example illustrating the problem would be great.