Lattice Diamond shows Synthesis exit by 9

Question

Why does Lattice Diamond shows Error 9 on a new project when compiling?

Error output is:

Details:
CCU2B:          40
FD1P3AX:        30
FD1P3AY:        8
FD1P3IX:        7
FD1S3AX:        52
FD1S3IX:        3
GSR:            1
IB:             10
INV:            1
OB:             9
OFS1P3BX:       1
ORCALUT4:       96
PFUMX:          1
PUR:            1
VHI:            1
VLO:            1
Mapper successful!

At Mapper Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 32MB peak: 149MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Jan  2 20:09:36 2019

###########################################################]


Synthesis exit by 9.
Done: error code 9

It works on one project, not on this one!

Answer 1

It happened to me when I had a format error in the .SDC file. (e.g. I commented a line in the .SDC file using "--" instead of "#") That was the easy one, but the reason I'm even here is that it was also separately caused by some other random errors I finally managed to correct. Which I can't talk about because I'm not sure which errors resulted in the problem.

Answer 2

I had the same problem and it happens when you (a) use Synplify Pro as synthesis tool and (b) have some non locally static statements in your code e.g. like this:

PORT MAP ( input => sig_a AND sig_b ... );

and (c) have not enabled VHDL 2008 support for your synthesis tool. You can enable this by selecting the option 'VHDL 2008' to 'True' in your active strategy file or under 'Project > Active Strategy > Synplify Pro Settings'.

Answer 3

Probably, there is a file which could not be opened, Permission denied. You have to find which file is it in the log output. Rename this file. A new file with that the correct name will be created during compilation. Hope this helps.