Setting 32 bit address size in inline PTX

Question

I'm in the processing of converting PTX written as a separate file to inline PTX. In the separate PTX file, I was defining the ISA and target as follows:

.version 1.2
.target sm_13

In the PTX file generated by the compiler, after having inlined the PTX, the compiler has specified ISA and target as follows:

.version 3.0
.target sm_20
.address_size 64

The .address_size 64 is problematic for me because it means that I would have to update the pointer arithmetic that I do in the inline PTX from 32 bit to 64 bit.

Given that 32 bits can address 4GB, more memory than my card has, is it possible to make the compiler specify a 32 bit address size, so that I don't have to update the pointer arithmetic?

Are 32 bit addresses supported on sm_20, given the new unified addressing system?

Answer 1

The 64 bit version of the NVCC compiler produces 64 bit PTX by default. If you try passing -m32 to nvcc as a command line option, it will generate 32 bit pointers. The option is covered in the NVCC documentation:

http://docs.nvidia.com/cuda/cuda-compiler-driver-nvcc/index.html#options-for-guiding-compiler-driver