I'm looking for suggestions on makefile organization. I am not a makefile expert. I don't mind learning, but it's not currently a strength of mine.
The problem: I have inherited a project that builds multiple firmware images for multiple similar but different platforms. In general, they share a common processor but use different peripherals or configure peripherals differently (at compile time) such that just building a library of common code isn't enough.
The current solution feels a bit lacking. It is a giant folder with all of the code grouped together. There exists a specific Makefile for each platform in this form: Makefile.XXX.mak. These makefiles include a common makefile (Makefile.common.mak) that does things like define the TOOLCHAIN_PATH and INDLUDE_PATH and things like that. The specific makefiles each enumerate all of the .c/.cpp files that are needed for the specific firmware image as well as all of the defines that are used within those files.
I'd like to do something that includes building a library (or a few libraries) with the common files, but it seems like that library would need to be forced to rebuild for each firmware image, due to different defines each image requires. I'd also like to reduce the number of makefiles out there and perhaps use targets rather than unique makefiles. Each firmware image requires a call 'make -f Makefile.XXX.mak' to build.