What are some good linting tools for verilog? I'd prefer one that can be configured to either handle or ignore certain vendor specific primitives like LUT's, PLL's, etc.
I recently tried verilator-3.810, but out of the box it needs a little help with the primitives.
So what (linting) tools do you use to deal with the not-so-strict syntax of verilog?
In my experience, it's generally not worth it. Anything I've tried needs loads of initial setup because out-of-the-box they try to check everything. But each shop has it's own coding standards - so you spend loads of time seasoning the linter to taste. Then once you try to integrate IP or code from another section of the company (which generally have a different idea of nice code), the linter goes mental, so you end up saying,
wire im_happy = Verdi_happy & simulator_happy & synth_happy;