I was reading about 32-bit PCI bus and how a PCI device advances its address. AD[31:0] is used to for addresses and data. If the PCI is requesting all four bytes to be transferred at the same time, then those four bytes will occupy all the lines including AD[1:0]. It means AD[1:0] cannot indicate how the target should advance the address during a multidata phase burst.
Source: PCI Bus Demystified by Abbott
Google Books: https://www.google.com/books/edition/PCI_Bus_Demystified/tVfeqL5F1DwC?hl=en&gbpv=1&pg=PA27&printsec=frontcover
I have tried to understand it on my own and consulted the internet without any success.