Is there a way to call $dumpvars, $dumpon $dumpoff
from the body() of a sequence ?
It is possible from a module task.
I need to control $dumpon $dumpoff so that the dump won't be too large
An alternative way would be to turn on a bit top.dump_on in the sequence and wait on this bit in the testbench
EDIT:
I added a top level module :
module dump ();
bit stop=1'b0;
task do_dump(string id);
fork begin
$display("DUMP START %s", id);
$dumpfile($psprintf("dump_%s.vcd", id));
$dumpvars(1, hmr_top.i_hmr.REF_CLK_IN,
hmr_top.i_hmr.RST_N,
hmr_top.i_hmr.SER_CLK,
hmr_top.i_hmr.VMKMODE,
hmr_top.i_hmr.SERIN,
hmr_top.i_hmr.SEROUT,
hmr_top.i_hmr.REF_CLK_OUT);
$dumpon;
wait(stop);
stop = 1'b0;
$dumpoff;
$display("DUMP END %s", id);
end join_none
endtask
function stop_dump();
stop = 1'b1;
endfunction
endmodule // dump
But when I try to invoke a second dump I get this Error :
Warning-[TFX-DUMPVARCA] DumpVar called previously As $dumpvars was called in previous time step, ignoring this call.$dumpfile at time
#11551000 Please refer to section 18.1.2 in the IEEE Verilog Standard 1364-2001 for details on $dumpvars.
any ideas ? Thx
Yes, you can call these system tasks from the
body
task in a UVM sequence. However, if thebody
task is called more than once in a simulation, you may get warnings for$dumpvar
. According to the IEEE Std 1800-2012, Section 21.7.1.2 "Specifying variables to be dumped ($dumpvars)":