How are current generation clock frequencies achieved?

Question

I was recently reading through the design of PLLs and was thinking about how these reference clocks are generated. We know that the reference is generated from a crystal (Generally Quartz), but the oscillations produced by these crystals top out at 100MHZ, how is this reference multiplied to achieve higher frequencies (GHz)?

Is there a circuit that is used to achieve this? (I'm looking at this from an analog designer's perspective).

Answer 1

Clock can be easily multiplied by 2 using clock trigger at both rising and falling edges. So, clock can get multiplied by 2^n using similar logic.