How to generate random numbers in FPGA for use as IV in cryptographic applications

Question

I am looking for a way to generate random numbers in FPGA for use as an IV for cryptographic applications. However, the answers to similar questions i found on Stackoverflow so far generate random numbers from a "Fixed SEED" which is not at all suitable for a cryptographic application. Pointers to two of such answers are as follows:-

Random number generation on Spartan-3E and How to generate pseudo random number in FPGA?

Hope to get some helpful answers in this regard from the community! Thanks

Answer 1

The issue is that you need some random entropy in order to generate a cryptographically secure pseudo number generator (CSPRNG). That generally is obtained by using portions of real-time events from am OS which may include interrupt timing and other hard things that are hard for am attacker to influence.

A FPGA in isolation is not going to have this source of entropy.

There are also several ways to create True Random Numbers Generators such as using multiple free running oscillators.