A user has a register in a bank implementing a read method through the io_memory interface. The memory operation is served by a memory link returning Sim_PE_Stall_Cpu on the first attempt. At first glance, he doesn’t see a way to propagate the stall exception upwards.
The main question:
How could he forward the stall exception to the caller of the register operation so it can retry?
More details:
Here is a piece of the read method he wants to implement:
method read() {
ex=$io_memory.operation(&mop,info);
if(ex==SIM_PE_Stall_Cpu )
**# What to do here to inform the reader about the stall?**
}
I have also attached the following file with pseudo-code to understand better what he wants to get in his DML: stall-sample.dml
Looking at the attached DML script, the customer has two devices. Here are more details about what the customer wants:
Device 1:
- To implement a read method from which it is possible to check if Sim_PE_Stall_Cpu occurs on Device 2.
Device 2:
- To implement a before_read method, including a mechanism to enable Device 1 to see the stall when Sim_PE_Stall_Cpu is gotten on Device 2.
- To implement a read method where it’s possible to get Sim_PE_Stall_Cpu from a memory link.
- To forward the stall exception to the caller of the register operation so it can retry.
I checked the content of the pci-device source files, but there is nothing to be considered useful for the use case described by the user.
I’d appreciate any suggestions on this topic.
Thanks,
-JC
I'm unsure how the
Sim_PE_Stall_Cpumechanism works exactly; the recommended way is to use the newtransactioninterface instead ofio_memory, and use theSIM_transaction_waitfunction to handle stalled transactions. This requires Simics 6 and DML 1.4.That said, I'll try to answer the question of how a DML 1.2 device can signal
Sim_PE_Stall_Cputo the initiator: DML 1.2 is hardcoded to return eitherSim_PE_No_ExceptionorSIM_PE_IO_Not_Takenfromio_memory.operation(seedml-builtins.dml:bank.io_memory.operation); however, it is possible to attach a different exception to the memop itself bySIM_set_mem_op_exception. If you overrideread_accessinstead ofreadin the register, then you can retrieve the memop through a method arg and set the exception. I don't know if this solves your problem, though; perhaps the CPU looks only at theio_memory.operationreturn value, disregardingSIM_get_mem_op_exception. In this case, you may need to insert a proxy object between memory-space and bank that converts any set exception to a return value.But, please keep in mind that whatever code you write for this will have to be rewritten in terms of
transaction_twithin a few years, so migrating to transaction_t now would likely save you time in the longer term.