I am rather new to uC programming and have hit a wall trying to find the base register address of comparator peripherals for the stm32f303k8. I couldn't find the info in either the reference manual, datasheet, or programming manual, as well as many other hits on various searches. I've seen that if a clock is enabled for the comparators it runs on the AHB clock, but a separate diagram shows the AHB feeding into both APB1 and APB2 and the comparators were specifically placed under the APB2. I am quite confused and would welcome any help (short of using libraries!), even a search string pointing me in the right direction.
Stm32f303k8 Comparator register address?
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You find the answer in the reference manual of your STM32F303k8 rather than in its datasheet.
In section 3.2.2 of the reference manual, you find both the relation between the peripherals and the buses through which you can reach them, and the boundary/base addresses of the peripheral registers. On Table 4 on pages 57/58 is for your controller subfamily. Here, I find a line on SYSCFG + COMP + OPAMP, which may be what you are looking for. Base address for all is 0x4001 0000, connection is through APB2.
Edit: If you want to check the documentation which buses/clocks are needed along the way to drive the peripheral, I recommend starting at Fig. 1 in Ch. 2 (p. 13) of the datasheet. Here, you find that APB2 is driven through AHB2, and that COMPs are configured through SYSCFG CTL. The clock tree depicted in Fig. 2 in Sec. 3.6 (p. 19) shows that APB2 clock is driven (with another prescaler) by the AHB clock (HCLK). The details are described in Ch. 2 of the reference manual.
I personally prefer to start with the clock tree editor tool embedded to STM32CubeMX because I feel too lazy to look up all the information at the beginning of development. This gives one the chance to start from a reasonable guess and verify if the clock settings are the needed ones afterwards.