What is the meaning of register1:register2 in assembly language?

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What is the meaning of register1:register2 in assembly language. For example ax:bx, then which type of address will be used in this instruction.
Obviously two registers AX and BX are involved in this situation, how do they contribute to make the outcome of the instruction?

I saw a code line like this:

add [es:di], ax

I tried to debug, but no results.

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Sep Roland On

What is the meaning of register1:register2 in assembly language. For example ax:bx, then which type of address will be used in this instruction.

register1:register2 (eg. ax:bx) is never used in any instruction. It is never a valid instruction component, rather it is a way to convey a meaning: the notion of a value larger than what one register can carry.

For example ax:bx, then which type of address will be used in this instruction. Obviously two registers AX and BX are involved in this situation, how they contribute to make the outcome of the instruction.

Please note that it need not stop at 2 registers.
It is always a combination of values, and the leftmost component is always considered the most-significant one.
Just how the individual values get combined varies.

Using general purpose registers

Your example of ax:bx typically signifies a 32-bit value for which the reconstituting rule is (ax * 65536) + bx.
Another example could be cl:bx:dx:ax and that one would ordinarily represent a 56-bit value obeying the rule (cl << 48) + (bx << 32) + (dx << 16) + ax.

Using special registers

If one of the registers is a segment register like in ds:dx, the reconstituting rule is different. It becomes (ds << 4) + dx, at least in the real address mode of the CPU. Operating in protected mode the combination cs:eip would reconstitute from adding the value in the EIP register to some base address found in a segment descriptor.

Even more special

There's nothing that prevents you from coming up with your very own formats. So, you could invent a combination of a 16-bit integral value with a fractional part in the range [0,99], simply by defining a combo like AX:BL, just an example.


I saw a code line like this:

add [es:di], ax

This es:di is not at all like the ax:bx we talked about above!
Here the colon character does not really combine these two registers as was discussed before. The colon in this (valid) instruction is actually a terminating character for the Segment Override Prefix. In a MASM-style assembler you could write this instruction like: add es:[di],ax, and in NASM you could write this same instruction also as es add [di],ax. See how es: no longer sticks to the di part? The [di] that remains is just one of the available 16-bit effective address forms:

[BX + SI] [BX + SI + disp8] [BX + SI + disp16]
[BX + DI] [BP + DI + disp8] [BP + DI + disp16]
[BP + SI] [BX + SI + disp8] [BX + SI + disp16]
[BP + DI] [BP + DI + disp8] [BP + DI + disp16]
[SI] [SI + disp8] [SI + disp16]
[DI] [DI + disp8] [DI + disp16]
[disp16] [BP + disp8] [BP + disp16]
[BX] [BX + disp8] [BX + disp16]
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rcgldr On

In 16 bit real mode, [es:di] generates an address of (es<<4)+di. In Windows 3.1 16 bit 286 protected mode, es points to a 64KB block of memory, and di is an index into that block of memory, and adding 8 to es will advance es to the next 64KB block of memory. For recent versions of Windows, gs is used for unique per thread local variables, such as the seed value for rand().