all
Referring to NXP's SR processor series, consider developing a radar system where the radar front-end transmits radar data through MIPI CSI-2, with a maximum support of 4 lane. SPI serves as the slave port for radar front-end configuration. I have several question: Firstly, i want to find a CPU processor that meets my requirements? Secondly, can we refer to the linux kernel v4l2 architecture to establish a collection system? Base on my system solution, i attempted to find several processors on the NXP's SR series first, but i found that the library function of MIPI CSI-2 are partially encapsulated in code. I am concerned that there may be issues with developing custom drivers in the future, so i will not consider using them. Then i found in the linux kernel that CPU models such as RK3399, I.MX and SAMSUNG exynos4412 all have MIPI CSI-2, but they are all used in cameras. I want to change the camera architecture to adapt to the radar architecture.