vhdl instruction requires: Not 64-bit mode

Question

I'm using ghdl (open source compiler for vhdl) on mac. I write this simple half adder component :

library ieee;
use ieee.std_logic_1164.all;

entity ha is 

    port( 
        a:  in  std_logic;
        b:  in  std_logic;
        o:  out     std_logic;
        c:  out     std_logic
    );

end ha;

architecture behave of ha is 
begin

    o <= a xor b;
    c <= a and b;

end behave;

when I want to analyze the ha.vhdl component (using -a switch) with command below, I get a lot of following error:

command: ghdl -a ha.vhdl

errors:

ha.s:90:2: error: instruction requires: Not 64-bit mode

pushl %ebp

ha.s:103:2: error: instruction requires: Not 64-bit mode

pushl %edx

. . .