what is the best practice to initialize a FIRRTL memory?

Question

When making a FIRRTL register, it is possible to provide a "with: (reset => ...)" value used to initialize the register.

When making a FIRRTL memory (aka a dynamic register array), there seems to be no corresponding syntax for providing an initial value for the memory elements. What therefore is the best practice for initializing a memory?

Answer 1

In general, there is no equivalent to a register reset for a memory because there is no way to reset all memory locations in a single cycle, when we look at the typical physical implementations of a VLSI memory (SRAM).

On ASICs, there is also (normally) no way to ensure that memory cells have a particular value when the circuit is powered on. However, in simulation, formal verification and on FPGAs, it is possible to ensure that a memory is initialized. For this purpose, there are several firrtl annotations which are respected by the Verilog backend, the treadle simulator and the formal backend. These annotations are:

• MemoryScalarInitAnnotation
• MemoryArrayInitAnnotation
• MemoryFileInlineAnnotation

You can see how these annotations can be used by looking at the corresponding tests in the firrtl repository.