why the maximum register length of SVE is 2048 bits？

Question

I was looking at ARM's SVE recently, and I was wondering why the maximum register length in SVE is 2048 bits, and what is the problem if it is larger than this value?

Answer 1

The vector length can be programmed using register field ZCR_ELx.LEN. The maximum vector length supported as of now is 2048 bits. If we see the register description of ZCR_ELx, LEN field as of now is constrained to 0-3 bits which makes maximum vector length supported to be 2048 bits. But there are bits 4-8 reserved as RAZ/WI which can be utilised in future architecture enhancements to increase the maximum vector length. There isn't any specific reason for vector length to be constrained to 2048 bits.

But increasing vector length to be greater than 2048 bits is also not trivial one because there are existing instructions like TBL which would break because number of maximum 8 bit elements that can be accessed is 255 and increasing vector length would break this instruction.