Ethernet SGMII Interface Design KC705 or KCU105

Question

I am going to use Ethernet on KCU105, the PHY is configured as SGMII mode only on the eval board. I know how to use the RGMII mode Ethernet by using Tri Mode Ethernet MAC IP on KC705 board. But i have no idea about SGMII interface.. I studied that TEMAC will be use with PCS PMA or SGMII IP for SGMII Ethernet. But I have no idea how to use it. Also there is AXI 1G/2.5G Ethernet IP which can be use, but same never used it.

I there is any one can guide me or provide an example design related to the SGMII Ethernet for seven series it will be great.

Software VIVADO 2015.4 boards, KC705 / KCU105 / VC707 HDL Verilog. thank you

Answer 1

Do as follows:

1. Take a block design
2. Add Microblaze ,AXI DMA, AXI TIMER, INTERRUPT CONTROLLER, AXI UART, AXI 1G/2.5G IP(enable SGMII)
3. Validate
4. Do sysnthesis
5. Add constraints
6. Do implementation
7. Generate bit file
8. Export Hardware, Launch SDK
9. Add lwip application
10. Run The application
11. Do ping test