Question

Does C++11 guarantee memory ordering between a release fence and a consume operation?

score 748 · Answer 1 · 2024-12-29 06:04:51

748

Views

Does C++11 guarantee memory ordering between a release fence and a consume operation?

Published on 29 December 2024 at 06:04

score 739 · Answer 2 · 2025-01-02 02:17:18

739

Views

Cheaper alternative to std::atomic<bool>?

Published on 02 January 2025 at 02:17

score 6.6k · Answer 3 · 2025-01-02 02:25:35

6.6k

Views

How can memory_order_relaxed work for incrementing atomic reference counts in smart pointers?

Published on 02 January 2025 at 02:25

score 466 · Answer 4 · 2025-01-02 02:25:03

466

Views

Is the value of steady_clock::now from multiple threads consistent with memory order?

Published on 02 January 2025 at 02:25

score 83 · Answer 5 · 2025-01-02 02:21:52

83

Views

Compiler/Hardware optimizations of code and relaxed atomics

Published on 02 January 2025 at 02:21

score 533 · Answer 6 · 2025-01-02 02:17:42

533

Views

std::memory_order_relaxed with fetch_add

Published on 02 January 2025 at 02:17

score 214 · Answer 7 · 2025-01-02 02:25:34

214

Views

C++ countdown in CyclicBarrier going wrong using atomic variables [solutions without locks please]

Published on 02 January 2025 at 02:25

score 1.3k · Answer 8 · 2025-01-02 02:22:44

1.3k

Views

C++ standard: can relaxed atomic stores be lifted above a mutex lock?

Published on 02 January 2025 at 02:22

score 284 · Answer 9 · 2025-01-02 02:17:17

284

Views

Atomic operations on a single variable

Published on 02 January 2025 at 02:17

score 162 · Answer 10 · 2025-01-02 02:16:31

162

Views

A Minimum Ordering Requirement

Published on 02 January 2025 at 02:16

score 160 · Answer 11 · 2025-01-03 06:54:56

160

Views

C++: Which weak atomic to use for buffers that receive async. RDMA transfers?

Published on 03 January 2025 at 06:54

score 216 · Answer 12 · 2024-12-29 05:39:08

216

Views

Why isn't [[carries_dependency]] the default in C++?

Published on 29 December 2024 at 05:39

score 2.9k · Answer 13 · 2025-01-02 02:25:24

2.9k

Views

Does atomic_thread_fence(memory_order_seq_cst) have the semantics of a full memory barrier?

Published on 02 January 2025 at 02:25

score 1.6k · Answer 14 · 2025-01-02 02:25:22

1.6k

Views

std::atomic_bool for cancellation flag: is std::memory_order_relaxed the correct memory order?

Published on 02 January 2025 at 02:25

score 766 · Answer 15 · 2025-01-02 02:21:01

766

Views

Using relaxed atomic boolean to synchronize two threads

Published on 02 January 2025 at 02:21

score 3.2k · Answer 16 · 2025-01-02 02:24:09

3.2k

Views

Why does memory_order_relaxed use atomic (lock-prefixed) instructions on x86?

Published on 02 January 2025 at 02:24

score 1.1k · Answer 17 · 2025-01-02 02:21:28

1.1k

Views

is std::atomic::fetch_add a serializing operation on x86-64?

Published on 02 January 2025 at 02:21

score 1.1k · Answer 18 · 2025-01-02 02:25:21

1.1k

Views

Are relaxed atomic store reordered themselves before the release? (similar with load /acquire)

Published on 02 January 2025 at 02:25

score 164 · Answer 19 · 2025-01-02 02:25:33

164

Views

What are the optimal std::memory_orders for this scenario of a coroutine waiting on an event?

Published on 02 January 2025 at 02:25

score 118 · Answer 20 · 2025-01-02 18:48:54

118

Views

Relaxed atomics in x86

Published on 02 January 2025 at 18:48

List Question

Does C++11 guarantee memory ordering between a release fence and a consume operation?

Cheaper alternative to std::atomic<bool>?

How can memory_order_relaxed work for incrementing atomic reference counts in smart pointers?

Is the value of steady_clock::now from multiple threads consistent with memory order?

Compiler/Hardware optimizations of code and relaxed atomics

std::memory_order_relaxed with fetch_add

C++ countdown in CyclicBarrier going wrong using atomic variables [solutions without locks please]

C++ standard: can relaxed atomic stores be lifted above a mutex lock?

Atomic operations on a single variable

A Minimum Ordering Requirement

C++: Which weak atomic to use for buffers that receive async. RDMA transfers?

Why isn't [[carries_dependency]] the default in C++?

Does atomic_thread_fence(memory_order_seq_cst) have the semantics of a full memory barrier?

std::atomic_bool for cancellation flag: is std::memory_order_relaxed the correct memory order?

Using relaxed atomic boolean to synchronize two threads

Why does memory_order_relaxed use atomic (lock-prefixed) instructions on x86?

is std::atomic::fetch_add a serializing operation on x86-64?

Are relaxed atomic store reordered themselves before the release? (similar with load /acquire)

What are the optimal std::memory_orders for this scenario of a coroutine waiting on an event?

Relaxed atomics in x86

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