Natural number not overflowing in Aldec ActiveHdl

Question

Getting a runtime error_0067 Value -1 out of range (0 to 7). Buf_ptr is set as a natural number but still goes negative because it is not overflowing back to 7. This can easily be fixed with an if statement but is there a setting in ActiveHdl that I need to enable to allow naturals to overflow?

.....
signal buf_ptr      : natural range 0 to 7
....
....
....
dma_wrt_Data(7 downto 0) <= incoming_data(buf_ptr);
bytes_available          <= bytes_available - 1;
buf buf_ptr              <= buf_ptr - 1;
packet_byte_count        <= packet_byte_count -1;
rcv_pkt_bct              <= rcv_pkt_bct - 1;

Scoured the web to see if anyone else had this problem, couldn't find any :(

Answer 1

Ranges do not do this. Mod does:

buf_ptr <= (buf_ptr - 1) mod 8;

Like @Tricky said, the purpose of a range is to allow checking of the bounds during an assignment.

Ada has modular types that may do this. These might be something interesting to have in VHDL, but someone would have to want to work on that aspect of the language. A starting point for this type of activity is: https://gitlab.com/IEEE-P1076/VHDL-Issues/-/issues

Answer 2

VHDL is a strongly typed language. Hence integer types have no concept of over/underflow. When an object is assigned a value out of range it is a run-time error.

If you want explicit over/underflow, you can do this with the unsigned/signed types from ieee.numeric_std package.