Override default memory access behaviour in ARM Cortex-M3

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According to ARM, the default behaviour of Cortex-M3 is to prevent execution from certain memory regions. Information here: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/CIHDHAEF.html

According to the above information page: "The optional MPU can override the default memory access behavior". That is all good, because we would like to execute code from the implementation specific 0xF0000000 region, which by default has the XN "Execute Never" flag set.

We are able to program the MPU to put additional restrictions on a memory region, so clearly the MPU works. But if we set the MPU to allow execution in the 0xF0000000 region, the CPU still enters exception when we try to execute at 0xF0000000.

Does anyone know if the Cortex-M3 MPU is supposed to be able to lift a default restriction, as the ARM page suggests?

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Although perhaps not clearly stated in the ARM documentation, it seems that the default MPU configuration is already the least restrictive possible, in order that a device with an MPU behaves identically to one without by default. So it makes sense that you cannot remove these restrictions.

The Memory access behaviour table shows the 0xE0100000- 0xFFFFFFFF region as a "Device" region rather then a memory region. The behaviour of the processor for device and normal regions is described at Memory regions, types and attributes. The requirement for a region with the device attribute preserve access order would require the processor to handle such memory differently when executing code, making the processor more complex. Execution from such memory would also be less efficient.

Essentially if the intent is to support execution from a memory, then it must be mapped to a memory region rather the a device region.

Note that in the Cortex-R4 documentation the restriction is clearly stated:

Instructions cannot be executed from regions with Device or Strongly-ordered memory type attributes. The processor treats such regions as if they have XN permissions.

I cannot however find a similarly unambiguous statement for M3.