Top level using port maps with records in VHDL

Question

To be able to support scalability in my VHDL design I started using records as in- and outputs for my components. Currently I am at the point where I want to link my component to the outside using port maps in a top level architecture. The problem is, the records have multiple variables wich have to be linked with different sources.

Currently my records used in the VHDL code look like this (names have been replaced with fakes):

TYPE some_record_input IS RECORD
    input_one   :   sfixed(3 downto -32);
    input_two   :   sfixed(3 downto -32);
    input_rst   :   std_logic;
END RECORD;

TYPE some_record_output IS RECORD
    output_one  :   std_logic_vector(15 downto 0);
    output_dn   :   std_logic;
END RECORD;

Hence that I'm using the fixed_pkg library for fixed points.
These records are used in the entity port map as follows.

ENTITY my_component IS
port
(
    clk     :   IN  std_logic;
    data    :   IN  some_record_input;
    result  :   OUT some_record_output
);
END my_component;

Now for the part where the problems occur. I use this component in my top level to link it with the buttons and leds available for my Altera Board. This is currently done by using a port map in my top level entity's body:

A0 : my_component PORT MAP(clk => CLK, data => (input_one => IONE, input_two => ITWO, input_rst => RST), result => (output_one => OONE, output_dn => ODN));

Hence that the capital signals are the outgoing ones. Clearly this is not the way to go since modelsim does not compile this. I was wondering if someone could tell me how port mapping a record is done for a top level entity in VHDL. Thanks in advance.

Answer 1

Rather than aggregates, use individual association of the record elements:

A0 : my_component
PORT MAP(
  clk => CLK, 
  data.input_one => IONE, 
  data.input_two => ITWO, 
  data.input_rst => RST, 
  result.output_one => OONE, 
  result.output_dn => ODN
);

When you do this, make sure to individually associate all parts of data and result. Also make sure not to mix other things between individual associations of an object, hence, all parts of data must be adjacent to each other.