I've downloaded the rocket-chip repo and the corresponding rocket-tools repo. Everything works just fine when I initially build everything.
I've created my own tightly coupled accelerator for the AES algorithm and want to test it using the custom-0 and custom-1 instructions. I've followed the instructions in the riscv-isa-sim repo (https://github.com/riscv/riscv-isa-sim) to simulate a new instruction and successfully rebuilt rocket-tools.
I want to make a really simple assembly test in rocket-tools/riscv-tests/isa/rv64ui/ to test my new instructions but when I run make in the isa folder, I get the Error: unrecognized opcode for all my instructions:
rv32ui/../rv64ui/aes.S: Assembler messages:
rv32ui/../rv64ui/aes.S:20: Error: unrecognized opcode `wkeyl x14,x1,x2'
rv32ui/../rv64ui/aes.S:21: Error: unrecognized opcode `wkeyh x14,x1,x2'
rv32ui/../rv64ui/aes.S:22: Error: unrecognized opcode `wstatel x14,x1,x2'
rv32ui/../rv64ui/aes.S:23: Error: unrecognized opcode `wstateh x14,x1,x2'
Makefile:74: recipe for target 'rv32ui-p-aes' failed
make: *** [rv32ui-p-aes] Error 1
make: *** Waiting for unfinished jobs....
What is the correct way to implement custom instructions in RISC-V? I tried to follow this tutorial but get a segmentation fault when I run spike: https://nitish2112.github.io/post/adding-instruction-riscv/