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13
Devhide
2023-10-27 12:03:00
22
Views
Renaming bluespec modules programatically
Published on
27 October 2023 at 12:03
#bluespec
55
Views
compilation of bluespec sv
Published on
21 November 2023 at 09:07
#digital
#register-transfer-level
#bluespec
411
Views
What is the purpose of this module?
Published on
17 July 2017 at 10:09
#verilog
#bluespec
88
Views
How to implement a spec and prove it using kami?
Published on
23 February 2021 at 07:17
#coq
#bluespec
942
Views
Bluespec $display within function
Published on
27 February 2013 at 01:51
#hdl
#bluespec
458
Views
Why does a 16bit LFSR pass all Diehard tests?
Published on
16 June 2016 at 21:23
#random
#bluespec
405
Views
How to link the software to a BlueSpec RISC-V implementation?
Published on
31 March 2021 at 15:49
#fpga
#xilinx
#riscv
#bluespec
1.9k
Views
How to implement a Left Shifter using Right Shifter?
Published on
03 November 2014 at 11:41
#vhdl
#bit-shift
#logical-operators
#bluespec
204
Views
Assigning values to Struct of Vectors in Bluespec SV
Published on
23 February 2020 at 07:24
#hdl
#bluespec
295
Views
Vector of registers size can not be parametrized by module parameter
Published on
11 March 2020 at 12:47
#bluespec
36
Views
How to explicitly declare and define a Clock and Reset in Bluespec BSV (Bluespec SystemVerilog)
Published on
27 January 2024 at 12:09
#reset
#clock
#bluespec
128
Views
What's the correct setup for Kami (Coq framework for Bluespec) to be able to run on WSL Ubuntu?
Published on
09 November 2021 at 03:09
#ubuntu
#makefile
#windows-subsystem-for-linux
#coq
#bluespec
3k
Views
Overflow in "addi" instruction of MIPS - Examples
Published on
07 March 2013 at 18:22
#assembly
#mips
#inline-assembly
#bluespec
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