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20
Devhide
2014-11-13 00:28:17
2.9k
Views
Understanding JMP Codes in Assembly
Published on
13 November 2014 at 00:28
#assembly
#x86
#disassembly
#opcode
#instruction-encoding
5.9k
Views
Why does jmpq of x86-64 only need 32-bit length address?
Published on
16 November 2014 at 08:31
#assembly
#x86-64
#cpu-architecture
#machine-code
#instruction-encoding
4.3k
Views
How to determine x86 machine opcode values based on real mode offsets and addressing?
Published on
05 September 2013 at 21:47
#assembly
#x86
#machine-code
#opcode
#instruction-encoding
76
Views
Which instruction encoding is supported by a ARM processor, particularly a Cortex M0, STM32F0 one for example
Published on
29 November 2023 at 15:27
#assembly
#arm
#cortex-m
#thumb
#instruction-encoding
60
Views
Breakdown MOV instruction on Intel 64 compatibility mode
Published on
04 December 2023 at 10:32
#assembly
#x86-64
#disassembly
#mov
#instruction-encoding
894
Views
How do you understand 'REX.W + B8+ rd io' form for x86-64 assembly?
Published on
06 April 2022 at 22:29
#assembly
#x86-64
#nasm
#machine-code
#instruction-encoding
118
Views
Intel Reference Specification Questions
Published on
05 April 2022 at 14:09
#assembly
#x86
#intel
#instruction-set
#instruction-encoding
708
Views
RISC-V U-Format instruction immediate confusion
Published on
15 April 2022 at 10:27
#assembly
#riscv
#machine-code
#immediate-operand
#instruction-encoding
175
Views
Properly writing a hexadecimal value to an address in x86 machine language
Published on
01 May 2022 at 21:00
#assembly
#x86
#machine-code
#instruction-encoding
2.1k
Views
MIPS Instruction Decoding
Published on
23 November 2018 at 23:33
#assembly
#mips
#disassembly
#objdump
#instruction-encoding
752
Views
Encoding x86-16 instruction with immediate operand
Published on
18 May 2021 at 12:49
#assembly
#x86
#machine-code
#instruction-encoding
197
Views
getting an opcode? To perform jmp
Published on
15 January 2023 at 21:22
#assembly
#x86-64
#machine-code
#instruction-encoding
139
Views
ARMv7 T3 encoding for adds
Published on
19 March 2022 at 08:07
#assembly
#arm
#thumb
#immediate-operand
#instruction-encoding
147
Views
Deciphering an SIB encoding from Intel x86-64
Published on
10 May 2022 at 14:58
#assembly
#x86-64
#disassembly
#machine-code
#instruction-encoding
866
Views
Hex machine code for mov immediate to 64-bit register doesn't have a REX.W prefix?
Published on
22 May 2022 at 13:35
#assembly
#x86-64
#nasm
#machine-code
#instruction-encoding
1.1k
Views
8086 instruction set: MODR/M byte
Published on
11 June 2022 at 01:30
#assembly
#x86-16
#machine-code
#operands
#instruction-encoding
707
Views
Why is x86 MOV two bytes, not one? How does the opcode and machine code work?
Published on
22 November 2022 at 19:06
#assembly
#x86
#machine-code
#instruction-encoding
67
Views
Assembly mov pointer calculation? How does it?
Published on
12 December 2022 at 05:38
#assembly
#x86-64
#reverse-engineering
#machine-code
#instruction-encoding
233
Views
Forcing a JMP rel32 (JMPQ)
Published on
12 December 2022 at 12:50
#assembly
#x86-64
#att
#instruction-encoding
9.5k
Views
Why doesn't MIPS have a Store Immediate instruction just like Load Immediate instruction?
Published on
23 May 2017 at 23:16
#assembly
#mips
#instruction-set
#immediate-operand
#instruction-encoding
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