Question

How to mark a C++ type as not "trivially_copyable", while keeping it "trivial for the purposes of calls" in the Itanium C++ ABI?

score 62 · Answer 1 · 2024-02-09T16:45:07.707000

62

Views

How to mark a C++ type as not "trivially_copyable", while keeping it "trivial for the purposes of calls" in the Itanium C++ ABI?

Published on 09 February 2024 at 16:45

score 505 · Answer 2 · 2023-02-19T04:27:01.070000

505

Views

Valgrind: The Impossible Happened IA-64 cached detected

Published on 19 February 2023 at 04:27

score 380 · Answer 3 · 2020-02-25T18:15:03.543000

380

Views

Why does the deleting destructor occupy a second vtable slot besides the ordinary destructor?

Published on 25 February 2020 at 18:15

score 237 · Answer 4 · 2019-09-25T05:54:00.803000

237

Views

get exponent of float by assembly instruction from c on Intel Core i5/7

Published on 25 September 2019 at 05:54

score 132 · Answer 5 · 2019-05-29T22:58:25.307000

132

Views

Issue with "C/C++11 mappings to processors" in proposed NOP memory barriers for Itanium?

Published on 29 May 2019 at 22:58

score 264 · Answer 6 · 2019-04-15T10:33:05.793000

264

Views

What are the registers names in the IA-64 architecture?

Published on 15 April 2019 at 10:33

score 3.7k · Answer 7 · 2018-03-12T13:52:41.440000

3.7k

Views

iam getting error like ORA-27125: unable to create shared memory segment

Published on 12 March 2018 at 13:52

score 136 · Answer 8 · 2018-02-11T21:13:58.663000

136

Views

Porting to Itanium & Gnat Ada

Published on 11 February 2018 at 21:13

score 49 · Answer 9 · 2017-01-23T11:42:51.730000

49

Views

JDK6 IA-64 vs x86_64 Multithreaded issues

Published on 23 January 2017 at 11:42

score 241 · Answer 10 · 2016-10-13T06:04:07.187000

241

Views

Does MinGW cross-compile IA64?

Published on 13 October 2016 at 06:04

score 75 · Answer 11 · 2016-09-30T06:05:07.103000

75

Views

OCaml native compiler for HP-UX IA64

Published on 30 September 2016 at 06:05

score 643 · Answer 12 · 2015-10-08T17:03:43.040000

643

Views

Missing ia64 or itanium 64 bit build target on Visual Studio 2010

Published on 08 October 2015 at 17:03

score 307 · Answer 13 · 2015-08-20T01:50:59.843000

307

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Published on 20 August 2015 at 01:50

score 1.2k · Answer 14 · 2015-06-04T10:46:04.640000

1.2k

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Published on 04 June 2015 at 10:46

score 1.3k · Answer 15 · 2014-10-26T07:20:39.853000

1.3k

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Are IA64 and SPARC chips RISC or CISC architecture?

Published on 26 October 2014 at 07:20

score 1.4k · Answer 16 · 2014-03-04T20:10:53.757000

1.4k

Views

"Hello World" in Openvms/Itanium assembly example?

Published on 04 March 2014 at 20:10

score 19.9k · Answer 17 · 2014-01-29T14:57:32.580000

19.9k

Views

What do x86_64, i386, ia64 and other such jargons stand for?

Published on 29 January 2014 at 14:57

score 50.9k · Answer 18 · 2013-12-17T15:04:56.777000

50.9k

Views

Assembly registers in 64-bit architecture

Published on 17 December 2013 at 15:04

score 849 · Answer 19 · 2013-09-20T02:25:46.907000

849

Views

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Published on 20 September 2013 at 02:25

score 2k · Answer 20 · 2013-04-18T22:38:02.957000

2k

Views

ld: Mismatched ABI (not an ELF file) cannot compile

Published on 18 April 2013 at 22:38

List Question

How to mark a C++ type as not "trivially_copyable", while keeping it "trivial for the purposes of calls" in the Itanium C++ ABI?

Valgrind: The Impossible Happened IA-64 cached detected

Why does the deleting destructor occupy a second vtable slot besides the ordinary destructor?

get exponent of float by assembly instruction from c on Intel Core i5/7

Issue with "C/C++11 mappings to processors" in proposed NOP memory barriers for Itanium?

What are the registers names in the IA-64 architecture?

iam getting error like ORA-27125: unable to create shared memory segment

Porting to Itanium & Gnat Ada

JDK6 IA-64 vs x86_64 Multithreaded issues

Does MinGW cross-compile IA64?

OCaml native compiler for HP-UX IA64

Missing ia64 or itanium 64 bit build target on Visual Studio 2010

HP-UX Itanium Compare and Swap

how is machine-virtualization achieved without hardware support

Are IA64 and SPARC chips RISC or CISC architecture?

"Hello World" in Openvms/Itanium assembly example?

What do x86_64, i386, ia64 and other such jargons stand for?

Assembly registers in 64-bit architecture

What does "a GP/function address pair" mean in IA-64?

ld: Mismatched ABI (not an ELF file) cannot compile

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