Multi-level page table in OS

Question

void virtual_memory_init(void) {
    kernel_pagetable = &kernel_pagetables[0];
    memset(kernel_pagetables, 0, sizeof(kernel_pagetables));
    kernel_pagetables[0].entry[0] =
        (x86_64_pageentry_t) &kernel_pagetables[1] | PTE_P | PTE_W | PTE_U;
    kernel_pagetables[1].entry[0] =
        (x86_64_pageentry_t) &kernel_pagetables[2] | PTE_P | PTE_W | PTE_U;
    kernel_pagetables[2].entry[0] =
        (x86_64_pageentry_t) &kernel_pagetables[3] | PTE_P | PTE_W | PTE_U;
    kernel_pagetables[2].entry[1] =
        (x86_64_pageentry_t) &kernel_pagetables[4] | PTE_P | PTE_W | PTE_U;

    virtual_memory_map(kernel_pagetable, (uintptr_t) 0, (uintptr_t) 0,
                       MEMSIZE_PHYSICAL, PTE_P | PTE_W | PTE_U, NULL);

    lcr3((uintptr_t) kernel_pagetable);
}

Based on the code that initiates a multilevel page table on an x64 system, how to determine once virtual_memory_init() completes execution which virtual address ranges are mapped to which physical address ranges?

I am confused about mapping virtual addresses to physical addresses in the multilevel page table. I know that the L4 table is 4K pte, each mapped to 2M pte in L3 and then L3 pte to 1 G in L2 and 512G in L1. But I don't know to calculate the corresponding ranges for virtual and physical addresses. Can someone explain how the ranges are found and what sources I can find for these problems on the multilevel page table?