Is there any way to keep the dirty bit in x86 page tables coherent without TLB invalidates?

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The Intel manual contains this admonishment (sec. 4.8):

A processor may cache information from the paging-structure entries in TLBs and paging-structure caches (see Section 4.10). This fact implies that, if software changes an accessed flag or a dirty flag from 1 to 0, the processor might not set the corresponding bit in memory on a subsequent access using an affected linear address (see Section 4.10.4.3). See Section 4.10.4.2 for how software can ensure that these bits are updated as desired.

This would seem to indicate that, after clearing the dirty bit in a page table entry, if I would like to be able to examine it in the future and get useful results, I need a TLB invalidate/shootdown. Is this true? Is there any alternative—some way to effectively clean the TLB entry in place if it exists?

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