I am new to FPGA and would really appreciate any help I can get for this problem. I am using Lattice ICE40UP5k evaluation board with Lattice radiant software. I want to use the PLL block from the IP catalog of radiant to generate a clock of higher frequency for my project. I followed this official user guide from radiant: https://www.latticesemi.com/-/media/LatticeSemi/Documents/ApplicationNotes/IK2/FPGA-TN-02052-1-4-iCE40-sysCLOCK-PLL-Design-User-Guide.ashx?document_id=47778 The problem is that the PLL is not generating any output clock in ModelSim. I am simulating using the Radiant simulation wizard.
[My top level code](https://i.stack.imgur.com/LYXMK.png)
[My testbench](https://i.stack.imgur.com/6ZV0N.png)
[ModelSim Simulation](https://i.stack.imgur.com/71av2.png)
[The PLL entity created by Radiant IP wizard](https://i.stack.imgur.com/rZcRV.png)