SGMII without phy - external loopback on Xlinix Zynq UltraScale+ RFSoC board

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I have a costume board with Xilinx Zynq UltraScale+ RFSoC. I'm using 3 PS_GTR transceivers as sgmii. 2 of them are connected to external Marvell phy and the third connects directly (fixed link - without phy).

In the manufacturing stage i would like to make sure that the direct sgmii interface is assembled correctly - so I made an external loopback between tx and rx sgmii signals. Now, Is it possible to transmit something through this external loopback and compare with the received data? Is it possible to ping with yourself? (simple ping command not working: "ping -I eth2 ")

perhaps there is a 'patch' under the 'macb' kernel driver that someone can guide me through?

Thank you all, Tzipi Kluska

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Yes it is possible to ping yourself. Note that linux does or at least used to bypass the hardware when talking to itself and would do the loopback in the IP stack. I recently saw someone within a terminal (window, command line) isolate one network interface, then another another network interface and then it was trivial to use stock tools like ping and iperf to test the link.

Before doing that though, the serdes on your part should have PRBS capabilities (for a reason), some may have internal scope like features that allow you to extract an eye or at least numbers that indicate the quality of the eye. The marvell phy should also have this capability and you can both use a loopback to talk to yourself use various prbs lengths to check the quality of the link (less than one error in so many 10 to the 14th bits or whatever your desired quality is), and then when connected to the marvell repeat that.

Before doing all of this the software is often the hard part and you need to insure you have it working first, so you may wish to do loopbacks inside the fpga that do not have analog issues and get the software worked out, then in the serdes on the edge of the fpga they may have loopbacks in both directions, the marvell as well may have loopbacks in both directions so you can for example go direct fpga to marvell one is the tx and one the rx and vice versa, or you might enable a lan side shallow loopback on the marvell and talk to yourself.

Also depending on these speeds, hand made loopbacks might be noisy so sometimes a pcb based loopback (which also has to be designed) may wish to be deployed.

Can you ping yourself, absolutely. You can use other low level network interfaces like sockets, to make raw packets and talk to yourself through these interfaces as well. Ping, doing a ping flood, iperf, netperf, etc are all fine ways to exercise or get a warm fuzzy about the interface during both development and manufacture test.

Being an fpga you can of course have a test design that you load into the fpga that pushes the external interfaces and reports the bit error rate.