I wrote an Instruction Set Simulator of a MIPS processor in C and synthesized it using Vitis HLS. As you see below there is a while loop and at each iteration of a while loop one instruction starts execution:
cycle = 0;
While(running){
#pragma hls loop pipelining II=1
cycle++;
....
I want to get the total number of cycles for a specified workload. It can be done using the report after cosimulation, but since the cosimulation takes a lot of time for a big workload(sometimes several days), I'm wondering how I can get it from my C code.
To get the total number of cycles I increased the variable cycle at every iteration of the loop and then after c synthesis the final number of cycles will be II*cycle. but this value is not matched with the number of cycles I get after cosimulation. I guess it's because of the memory conflict on data memory(I used M-axi protocol for data memory to design an off-chip data memory). Does anyone know how I can instrument my C code to be able to get the correct number of cycles?
Thanks in advance