I am learning FPGA recently. I have tried to use sdram, somebody recommends me use it through nios ii. But I see some articles using ip core on nios ii(c/c++) it may slow than you write through verilog? Why? Because Hardware(fast, parallel) and Software?
What is difference between soft core on NIOS and hard core?
2.3k Views Asked by Zhi-ting Lin At
1
There are 1 best solutions below
Related Questions in VERILOG
- Tick-including a header file inside package in systemverilog
- Others => '1' statement in Verilog
- Why there are verilog verification files not in the form of module?
- Creation of array in Verilog that can store real values
- Array initialization error in Verilog
- Verilog signed unsigned operation
- What does Z in Verilog stand for?
- Properly including a .vh in a .sv file?
- Unknown Wrong result when simulating Verilog design in modelsim
- Verilog simulation x's in output
- Verilog generate statement : conditional port connections
- Divide by 2 clock and corresponding reset generation
- What is the meaning of this code statement in verilog?
- Use of << in given Verilog code?
- Verilog Testbench constant exp and pram compilation and simulation errors
Related Questions in FPGA
- Is an inferred latch in Quartus II necessarily transparent
- VHDL, concurrent signal assignment wrong on FPGA but right in Modelsim
- Read file in FPGA
- xilinx sdka error when using lwip library
- How to demonstrate a 32-bit MIPS with FPUs in a FPGA?
- How to get rid of scale factor from CORDIC
- Verilog Inter-FPGA SPI Communication
- Using C programming to call VHDL implementation
- Why we use CORDIC gain?
- Altera UART IP Core
- What is the cause of Vivados 'synth 8-1027' error?
- How to change timescale of VCD file dumped?
- Sync two FPGAs to generate same Sine Wave
- Connect stack of Parallela boards and a rPI via FPGA and 1/0 pins
- Error synthesizing hierarchical names in vivado
Related Questions in NIOS
- NIOS II system consisting of multiple cores
- What is difference between soft core on NIOS and hard core?
- How can I modify the makefile to get more info?
- Without using interrupts produce a rising sawtooth waveform
- MIPS asm to C: How to set .section directives
- Trying To Shift Hex Values, Help Please
- How to develop this algorithm?
- Polling with C and assembly for Nios 2
- Why unresolved inclusion?
- NIOS II error: invalid suffix on integer constant
- Nios 2 subroutine keeps running after return
- NIOS II IDE unsuably slow
- jmpi instruction in NIOS
- Assembly's function parameter
- Create array of bytes
Trending Questions
- UIImageView Frame Doesn't Reflect Constraints
- Is it possible to use adb commands to click on a view by finding its ID?
- How to create a new web character symbol recognizable by html/javascript?
- Why isn't my CSS3 animation smooth in Google Chrome (but very smooth on other browsers)?
- Heap Gives Page Fault
- Connect ffmpeg to Visual Studio 2008
- Both Object- and ValueAnimator jumps when Duration is set above API LvL 24
- How to avoid default initialization of objects in std::vector?
- second argument of the command line arguments in a format other than char** argv or char* argv[]
- How to improve efficiency of algorithm which generates next lexicographic permutation?
- Navigating to the another actvity app getting crash in android
- How to read the particular message format in android and store in sqlite database?
- Resetting inventory status after order is cancelled
- Efficiently compute powers of X in SSE/AVX
- Insert into an external database using ajax and php : POST 500 (Internal Server Error)
Popular Questions
- How do I undo the most recent local commits in Git?
- How can I remove a specific item from an array in JavaScript?
- How do I delete a Git branch locally and remotely?
- Find all files containing a specific text (string) on Linux?
- How do I revert a Git repository to a previous commit?
- How do I create an HTML button that acts like a link?
- How do I check out a remote Git branch?
- How do I force "git pull" to overwrite local files?
- How do I list all files of a directory?
- How to check whether a string contains a substring in JavaScript?
- How do I redirect to another webpage?
- How can I iterate over rows in a Pandas DataFrame?
- How do I convert a String to an int in Java?
- Does Python have a string 'contains' substring method?
- How do I check if a string contains a specific word?
What is a soft-CPU? FPGAs are composed of, among other things, reconfigurable logic blocks (LUTs), Memory, and multipliers/DSPs. A soft CPU is a CPU made up of the FPGAs configurable logic. Nios II is Altera/Intel's flavour of a soft CPU. This differs from a hardened CPU like the ARM cores included in many Altera/Intel and Xilinx SoC FPGAs. In these cases, the ARM cores in made of fixed transistors instead of FPGA fabric, and cannot be reconfigured for other purposes.
Why have hardened CPUs? They're typically faster than soft CPUs, take up less space, and don't consume any of the valuable FPGA routing. Since many designs use some sort of CPU, hardening one (like is done with many popular I/O interfaces) it produces an overall net gain. (If you don't need a CPU, you can simple buy a non-SoC FPGA.
As for using a CPU vs pure logic/hardware, there are also tradeoffs. Writing software is typically easier than Verilog, and your CPU will be set up to manage things like response times and other memory quirks. However, you'll be restricted by the CPU speed (Nios is typically 100-200MHz, depending on your FPGA), and the extra latency of needing to interface with a CPU, and the CPU instruction execution speed.
In a similar vein to why FPGAs are gaining popularity, pure-hardware circuit have specialization that can allow them to operate faster than a more multipurposed CPU (either soft or hardened). The tradeoff you get for that speed boost is the extra work involved in writing timing-accurate Verilog.