Set value of register to 64-bit integer in RISC-V

Question

The task is to set the value of a0 to 0xbadcab1e. a0 is a 64-bit integer. I may only use sll, slli, srl, srli, sra, srai, add, addi, sub, lui. "Hint: The addi instruction sets the 12 bottom bits of the target register. But problem: it sign-extends it! Can you work around it?"

I wrote the following code and I do not understand why it doesn't work:

lui a0, 0xB 
srli a0, a0, 36 
addi t1, zero, 0x1E 
lui t2, 0xBADCA 
srl t2, t2, 32 
add a0, a0, t1 
add a0, a0, t2